Evolution of silicon wafer manufacturing process

1. Single crystal growth** - CZ method (direct pull method) or FZ method (melting zone method) is used to grow single crystal silicon rods, and the <100>/<111> crystal orientation is controlled

2. Precision slicing** - Diamond wire saw cutting, thickness error within ±5μm

3. Nano-level polishing** - Double-sided chemical mechanical polishing (CMP) achieves Ra<0.5nm surface roughness

4. Ultra-clean cleaning** - 18MΩ ultra-pure water combined with SC1/SC2 cleaning process

          Frontier application areas

1.Logic chips below 7nm**: 300mm silicon wafers carry tens of billions of transistors

2.3D NAND storage**: Substrate materials with more than 200 stacking layers

3.Automotive-grade IGBT**: 8-inch heavily doped silicon wafers meet AEC-Q101 standards

4.Silicon photonics**: SOI wafers realize optical communication chip integration